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Overview

About the course

The course will introduce the participants to the basic design flow in VLSI physical design automation, the basic data structures and algorithms used for implementing the same. The course will also provide examples and assignments to help the participants to understand the concepts involved, and appreciate the main challenges therein.



Intended Audience

Computer Science and Engineering / Electronics and Communication Engineering / Electrical Engineering

 

Pre-requisites

Basic concepts in digital circuit design

Industries that will recognize this course

Intel, Cadence, Mentor Graphics, Synopsys, Xilinx

Syllabus

Week-1        Module 1:      Introduction to physical design automation       

Week-2        Module 2:      Floorplanning  and Placement                       

  Week-3        Module 3:      Routing                                                          

  Week-4        Module 4:      Static Timing Analysis: Part 1                         

Week-5        Module-5:      Static Timing Analysis: Part 2                               

Week-6        Module 6:      Signal Integrity and Crosstalk Issues                              

Week-7        Module 7:      Clocking Issues                                                      

Week-8        Module 8:      Clock Tree Synthesis                                   

Week-9        Module 9:      Low Power Design Issues                                                

Week-10:     Module 10:    Low Power Design Techniques and Planning                         

Week-11:     Module 11:    Noise Analysis and Layout Compaction                        

Week-12:     Module 12:    Physical Verification and Sign-off                                                                                   

 

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