When developing chips it is essential that they get verified thoroughly because it is very hard or impossible to fix them once they have been manufactured. In this class, you will learn how to program verification environments that verify chip functionality efficiently, as well as understand and leverage automation such as constrained random test generation and improve code reuse leveraging a standardized methodology.Why Take This Course?
This course will teach you how to think like a verification engineer.
It will show the software development aspects you need to know to
ensure chips are working as expected. You will learn how to implement verification environments.
**Lesson 1:** Introduction to Hardware Verification
**Lesson 2:** Basic stimulus modeling and generation
**Lesson 3:** Interfacing to the Hardware Model
**Lesson 4:** Monitoring and Functional Coverage
**Lesson 5:** Checking
**Lesson 6:** Aspect Oriented Programming
**Lesson 7:** Reuse Methodology
**Lesson 8:** Debugging
**Lesson 9:** Conclusion and Exam
Axel Scherer and Hannes Fröhlich