At-Scale Formal Verification for Industrial Semiconductor Designs - Professor Tom Melham

At-Scale Formal Verification for Industrial Semiconductor Designs - Professor Tom Melham

Alan Turing Institute via YouTube Direct link

Intro

1 of 29

1 of 29

Intro

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At-Scale Formal Verification for Industrial Semiconductor Designs - Professor Tom Melham

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  1. 1 Intro
  2. 2 A Modern Microprocessor
  3. 3 And Hard to Get Right
  4. 4 Back in 1985...
  5. 5 Advance to 2009
  6. 6 Back to 1985
  7. 7 Symbolic Trajectory Evaluation
  8. 8 Combination of Two Good Ideas
  9. 9 State Space Abstraction
  10. 10 Guard Expressions E
  11. 11 Result - Partitioned Abstraction
  12. 12 Key Technical Idea - Exploit Symmetry
  13. 13 Intel's Forte Tool
  14. 14 Forte Methodology
  15. 15 Key Drivers of Progress
  16. 16 Formal Verification in Practice
  17. 17 Problems, problems...
  18. 18 Region of Productivity
  19. 19 Life in the Region of Innovation
  20. 20 Example - SoC Formal Verification
  21. 21 Potential Roadblocks
  22. 22 Overcoming Roadblocks
  23. 23 Forte Data Points
  24. 24 Region of Research?
  25. 25 Software - A Much Bigger Problem
  26. 26 Embedded Software
  27. 27 Working Definition
  28. 28 Effective Validation of Low-Level Firmware
  29. 29 Ongoing Work

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