This course covers the learning outcomes and goals of Electronic Design Automation (EDA) and its role in the resurgence of chip design. Students will learn about the design capabilities in the current landscape, the impact of Dennard Scaling, and the historical markets of EDA. The course also delves into the EDA segments in 2018, the revenue generated by top EDA and semiconductor IP companies, and the evolution of EDA tools. The teaching method includes an overview of EDA tools required for chip design, advancements in ESL for FPGA, higher levels of IP integration, and the future of computing post-Moore's Law. The intended audience for this course includes individuals interested in chip design, electronic automation, and the semiconductor industry.
Overview
Syllabus
Introduction.
NVidia 2.5D-IC.
Design Capabilities Today.
And Dennard Scaling.
Heroic Efforts?.
Transport of an EUV System.
Computing after Moore's Law.
(Digital) Design Flow from 30,000 feet.
EDA is the Set of Tools Required to Design a Chip.
EDA Segments 2018.
EDA Historical Markets.
Top EDA & Semiconductor IP Yearly Revenue.
The EDA Industry in Perspective.
A Brief History of EDA.
What Electronic Automation Can Do (and Mechanical Can't).
What's New? ESL for FPGA.
What's New? Higher Levels.
What's New? IP Integration Everywhere.
Taught by
Stanford Online
