This course covers the evolution of computer architecture from the early days of IBM's incompatible computer lines to the current era of Domain Specific Architectures (DSAs). The learning outcomes include understanding the transition from CISC to RISC, the "Iron Law" of Processor Performance, and the impact of deep learning on machine learning. Students will learn about microprocessor evolution, the challenges of transitioning from RISC to Intel/HP Itanium, and the potential of DSAs in achieving higher efficiency. The course teaches skills such as analyzing microcoded machines, evaluating the performance of different architectures, and exploring domain-specific languages. The teaching method involves a historical overview, case studies of specific architectures, and discussions on current trends in computer architecture. This course is intended for students and professionals interested in computer science, engineering, or anyone looking to deepen their understanding of modern computer architecture.
Stanford Seminar - New Golden Age for Computer Architecture - John Hennessy
Stanford University via YouTube
Overview
Syllabus
Introduction.
Outline.
IBM Compatibility Problem in Early 1960s By early 1960's, IBM had 4 incompatible lines of computers!.
Microprogramming in IBM 360 Model.
IC Technology, Microcode, and CISC.
Microprocessor Evolution • Rapid progress in 1970s, fueled by advances in MOS technology, imitated minicomputers and mainframe ISAS Microprocessor Wers' compete by adding instructions (easy for microcode). justified given assembly language programming • Intel APX 432: Most ambitious 1970s micro, started in 1975.
Analyzing Microcoded Machines 1980s.
From CISC to RISC . Use RAM for instruction cache of user-visible instructions.
Berkeley & Stanford RISC Chips.
"Iron Law" of Processor Performance: How RISC can win.
CISC vs. RISC Today.
From RISC to Intel/HP Itanium, EPIC IA-64.
VLIW Issues and an "EPIC Failure".
Fundamental Changes in Technology.
End of Growth of Single Program Speed?.
Moore's Law Slowdown in Intel Processors.
Technology & Power: Dennard Scaling.
Sorry State of Security.
Example of Current State of the Art: x86 . 40+ years of interfaces leading to attack vectors · e.g., Intel Management Engine (ME) processor . Runs firmware management system more privileged than system SW.
What Opportunities Left?.
What's the opportunity? Matrix Multiply: relative speedup to a Python version (18 core Intel).
Domain Specific Architectures (DSAs) • Achieve higher efficiency by tailoring the architecture to characteristics of the domain • Not one application, but a domain of applications.
Why DSAs Can Win (no magic) Tailor the Architecture to the Domain • More effective parallelism for a specific domain.
Domain Specific Languages.
Deep learning is causing a machine learning revolution.
Tensor Processing Unit v1.
TPU: High-level Chip Architecture.
Perf/Watt TPU vs CPU & GPU.
Concluding Remarks.
Taught by
Stanford Online
